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4-7 Oct 2021 Bordeaux (France)
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Program > Invited papersKEYNOTESNanoscale InGaAs Electronics: Lessons towards transistor innovation in new material systems In the last few years, due to its extraordinary electron transport properties, there has been strong interest in the prospects of InGaAs for advanced electronics. Extremely scaled 3D transistors with high aspect-ratio FinFET and nanowire geometries have been demonstrated. Yet, their performance has been disappointing, well below what is to be expected from this material system. This talk will review recent research on nanoscale InGaAs MOSFETs. It will describe some of the technological advances that have been realized at MIT, such as thermal atomic-layer etching and alcohol-based digital etch. It will also describe some of the shortcomings that have been encountered and discuss possible solutions: OFF-state leakage current, mobility degradation in scaled structures and gate oxide trapping. The research holds valuable lessons for the development of advanced electronics on novel material systems.
FD-SOI, the path to energy efficiency for 5G, AI and Automotive applications. Fully depleted silicon-on-insulator devices built on an ultrathin SOI layer on a buried-oxide substrate feature unique performance capabilities and are suitable for full-range body biasing. FD-SOI technology has been adopted for multiple technology nodes and a wide range of current and upcoming microelectronic market segments, especially in the Internet of Things (IoT), artificial intelligence (AI), 5G and automotive applications, where ultralow power and reliability are required.
Runtime Reliability Hardening for Edge AI and Automotive applications The next decade will see the advent of the Artificial Intelligence both at the edge of the network and in automotive applications. The AI revolution is driven by the need to process the data locally near the sensors to avoid wasting 80% of the overall information available. Such revolution will be enabled by more complex processing architectures located close to the sensors. The new processing architectures imply massively parallel processing which would require expensive margins and/or monitors to insure reliability at the cost of peak performance and energy efficiency. The location close to the sensors implies a greater sensitivity to Process Voltage Temperature (PVT) variations together with Aging variations. The lecture will address what are the solutions foreseen to tackle together the reliability threads and the performance/energy efficiency challenges so to enable the Edge AI revolution. These solutions require to have a 360 degrees approach spanning from technology level (material) through various design stages up to software level.
INVITED PAPERS
AI Techniques for Fault AnalysisIdentification and localization of faults in semiconductors is a very knowledge-intensive task. The more information an engineer has about a sample at hand, the accurately and cost-effectively its analysis can be done. Often valuable information, such as method know-how, best practices, or reports of previous investigations, is available in different support systems, like file shares, wikis, or databases. However, all these systems are rarely connected since they store information in formats designed for human use only, like unstructured text. As a result, an expert must act as a mediator between such systems by transforming the output of one system into an input format of the other one. Such manual alignment of systems is time-consuming and causes engineers to rely on their own expertise. Modern Artificial Intelligence (AI) methods can help experts to access all required information in a single uniform interface by enabling automated interoperability between the available systems. In this talk, we discuss logic-based and machine learning methods that can be used to solve the interoperability problem. The first group of methods focuses on applying ontologies to formalize knowledge in the fault analysis domain. The impact of such formalization is twofold. First, ontologies standardize notions used by experts and thus reduce the ambiguity of personal communication. Second, they provide other AI systems with sets of clearly defined concepts and relations between them that machines and experts interpret in the same way. Thus, one can use classes defined in the ontology, e.g., faults, tools, or locations, as labels for training data sets of machine learning methods, such as Natural Language Processing (NLP). The latter can be applied to train classification models that are able to process (un)structured documents from different information systems and align them based on the ontology concepts.
Buffer Trap-Induced Current Saturation and Current Collapse in GaN DevicesGaN-based HEMTs are now dominant in many high efficiency power amplifier applications, however surprisingly there are many aspects of the devices, especially related to their instabilities that are poorly understood. The semi-insulating buffer layer under the 2D electron gas channel acts to suppress off-state leakage, reduce output conductance and capacitance, but is also the source of multiple issues including current-collapse, dynamic Ron, and kink effect. These are usually discussed in terms of their trap energy levels, cross-sections, and densities. However, here we will show that these instabilities can often be better understood by considering Fermi-level pinning by background carbon acceptors, compensation ratio, and especially the transport to and from the traps dictated by the device electrostatics.
State of Health Estimation of Electronic Packages using Piezoresistive Stress sensorTo meet social expectancy, the electronics systems that are used in automotive industry become more complex. The electronic control units that will be used in highly automated and autonomous cars will typically be smart systems of 3rd generation, which will perform human like operations. The 3rd generation smart systems will act independently in respect to control and decision making. In addition, these systems will be capable to self-testing, self-calibration and self-healing. Furthermore, the Internet of Things concept will bring electronic components that are traditionally developed for consumer electronic market under the engine hood. All of the aforementioned aspects will require new approaches to reliability and quality assurance. It is already observed that the lifetime requirements for embedded electronics used in automotive are increasing. At the same time the time of qualification and the cost of reliability tests are expected to be reduced. All these challenges and requirements can be realized by developing a new reliability concept that is strongly supported through numerical simulation and product optimization at a very early development stage. A possible solution is called prognostics and health managements. I will present an example of in-situ ASIC degradation monitoring of ASIC using a piezoresistive stress sensor. The data driven approach utilizes unique data sets from the stress cells and combines them with the state of health of the IC device. Machine learning techniques are used for fault detection and classification.
Vertical GaN devices: process and reliabilityGaN-based power devices have been proven their competence in high power applications. GaN lateral devices are now commercially available rating voltages up to 900V. For higher voltage ratings, the area of lateral HEMTs increase significantly hence degraded cost effectiveness. Additionally, the difficulty in growth of thick buffer layer on Si and poor reliability hinders the development GaN lateral HEMTs. The vertical GaN power devices are promising candidates to realize breakdown voltages >1kV by using thick drift layer without enlarging the device footprint. Moving the peak electric field away from the surface into the bulk minimizes trapping effects and improves device stability and reliability. Vertical GaN diodes and transistors have already been demonstrated, with breakdown voltage up to 4kV. Most of them are grown on free-standing GaN substrates, which is not cost effective for industrial production. Our approach of fabricating the vertical GaN technology on a 200mm CMOS compatible platform, can lead to significant cost savings. This work reviews the challenges related to the substrates, growth of GaN stacks, devices fabrication in 200mm CMOS platform and device performance and reliability.
Practical considerations for the reliability of fiber optic monitoring serving condition-based maintenance of aerospace-grade componentsOptical fibre sensors are increasingly used on aerospace-grade carbon fibre reinforced polymer (CFRP) components owing to their light weight, small diameter, multiplexing capabilities and immunity to electromagnetic interference. A permanently installed fiber optic monitoring network of fibre Bragg gratings (FBGs) would allow a transition from time-based maintenance to condition-based maintenance. The current state-of-the-art of BVID detection with OFS remains however at low technology readiness levels and the demonstrations found in literature are often not tested for their compatibility with aerospatial conditions. We therefore address practical considerations for the reliability of fiber optic monitoring: we deploy an in-flight compatible surface mounted OFS network, obtain detection thresholds for BVID detection in view of relevant on-ground conditions, and summarize the health of a component in one Global Damage Index number, based on the readings of the sensor network. We validate our findings on coupon, element and subcomponent level.
From semiconductor components to the LHC "system of systems": dealing with radiation effects in critical high-energy accelerator equipmentSuccessfully operating critical systems based on commercial electronics components in radiation environments poses unique challenges related to the design and qualification of such systems. In this presentation, we will cover the various steps of the Radiation Hardness Assurance (RHA) approach in the Accelerator and Technology Sector (ATS) at CERN, highlighting the key constraints and providing some examples of radiation tolerant developments for accelerators. Such RHA steps include radiation monitoring and calculations in order to specify the related requirements, designing custom systems based on commercial parts and with radiation effects mitigation in mind, as well as the actual radiation qualification of the related semiconductor components and systems.
Reliability of automotive and consumer MEMS sensors - an overviewIn our daily life, sensors play more and more an important role. They take over many functions in the automotive world as well as in consumer products with an increasing dissemination of the internet of things. In addition, they offer a broad variety of new applications. Sensors are typically build up in a package including a sensing element (e.g. micromechanical structures in acceleration sensors or membranes in gas sensors, etc.) and a microelectronic chip to evaluate the sensor data. This article will give an overview, how the reliability of such a system is validated. The challenges for reliability in terms of requirements and qualification for automotive and consumer applications will be discussed. The complex structure of a sensor module in combination with a broad variety of materials implies many possible failure mechanisms, which have to be considered. Some relevant sensor failure mechanisms caused by mechanical shock, thermo-mechanical stress and the influence of humidity on sensor reliability will be shown. The challenges for describing the influence of humidity on the sensor lifetime by an acceleration model will be discussed in detail. Finally, the paper will give an outlook for the reliability challenges of future sensor applications.
Innovation and Novelty in Electrostatic Discharge (ESD) and Electrical Overstress from 1980 to 2020In this lecture, an overview of the innovation and novelty of electrostatic discharge (ESD) and electrical overstress (EOS) protection from 1980 to 2020 will be discussed. The lecture will review the evolution of design practices, structures, chip architecture, technology, testing models, test equipment, standards, computer aided design (CAD) checking and verification in the ESD protection of semiconductors. The progression of ESD practices in semiconductors, and innovations will be shown. The focus will be on the steps taken to provide improved ESD protection in today’s technologies.
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